DeNovo: A Software-Driven Rethinking of the Memory Hierarchy

Sarita Adve Visiting Professor in the School of Computer and Communication Sciences at EPFL and Professor of Computer Science at the University of Illinois at Urbana-Champaign Tuesday, September 30, 2014 @ 4:00 pm BC 420 Hosted by: Prof. Babak Falsafi
Cookies and drinks will be available before the talk as from 3:45 pm.

Abstract

In the brave new post-Dennard-scaling world, the computing industry has chosen to scale the power wall by supporting parallelism and heterogeneity. Unfortunately, the resulting systems are complex and inefficient in both software and hardware. To tame software complexity, much recent research has proposed replacing the currently prevalent “wild shared memory” multicore programming models with a more disciplined approach. The DeNovo project asks the question: if software is more disciplined, can we design a more efficient memory hierarchy? Starting with determinism as a discipline to drive DeNovo, we first show that coherence and communication architectures that exploit this discipline can be far more complexity-, performance-, and energy-efficient than today’s largely software-oblivious memory hierarchies. Armed with an understanding of how to eliminate today’s inefficiencies, we then show that DeNovo’s benefits can be achieved even for non-deterministic applications, including those relying on arbitrary unstructured synchronization. Finally, we show that the DeNovo vision also naturally applies to heterogeneous systems which are already programmed in more disciplined environments. We show how DeNovo unifies the heterogeneous memory components in such systems (e.g., scratchpads, caches, FIFOs) to provide an efficient, globally addressable, coherent shared memory space while still benefiting from the specialization afforded by the diverse structures. In summary, the answer to the original question driving DeNovo increasingly appears to be “yes!”

Biography

Sarita Adve is Visiting Professor in the School of Computer and Communication Sciences at EPFL and Professor of Computer Science at the University of Illinois at Urbana-Champaign. Her research interests are in computer architecture, parallel computing, and power- and reliability-aware systems. She co-developed the memory models for the C++ and Java programming languages based on her early work on data-race-free models. She is a recipient of the Anita Borg Institute Women of Vision award in innovation, the ACM SIGARCH Maurice Wilkes award, and an Alfred P. Sloan Research Fellowship. She is a fellow of the ACM and the IEEE and was named a University Scholar by the University of Illinois. She serves on the boards of the Computing Research Association and ACM SIGARCH. She received the Ph.D. in Computer Science from Wisconsin in 1993 and a B.Tech. in Electrical Engineering from IIT-Bombay in 1987.