Performance interfaces are to performance what semantic interfaces (documentation, header files, specifications, etc.) are to functionality: succinct descriptions of the performance one can expect when running that code. Performance interfaces differ from performance specifications and/or models in that they are succinct and highly accessible to the average developer, in the same way that a semantic interface differs from a formal specification.
Our research pursues three broad directions:
- Extracting performance interfaces from code or design docs, and using them to develop applications that meet their performance expectations
- Designing systems that exhibit predictable performance and are thus amenable to being described using a performance interface
- Verifying formally that systems code will indeed perform as advertised by its performance interface
Publications
- Performance Interfaces for Hardware Accelerators.
Jiacheng Ma, Rishabh Iyer, Sahand Kashani, Mahyar Emami, Thomas Bourgeat, George Candea [ paper | code] @OSDI ‘24 - Automatically Reasoning About How Systems Code Uses the CPU Cache.
Rishabh Iyer, Katerina Argyraki, George Candea [paper | code ] @OSDI ‘24 - Achieving Microsecond-Scale Tail Latency Efficiently with Approximate Optimal Scheduling.
R. Iyer, M. Unal, M. Kogias, G. Candea [paper | code] @SOSP ‘23 - Latency Interfaces for Systems Code. R. Iyer [PhD thesis] EPFL 2023
- The Case for Performance Interfaces for Hardware Accelerators.
R. Iyer, J. Ma, K. Argyraki, G. Candea, S. Ratnasamy
[paper] @HotOS ‘23 - Performance Interfaces for Network Functions.
R. Iyer, K. Argyraki, G. Candea [paper | code | talk video] @NSDI ‘22 - Performance Contracts for Software Network Functions.
R. Iyer, L. Pedrosa, A. Zaostrovnykh, S. Pirelli, K. Argyraki, G. Candea [paper | code | talk video] @NSDI ‘19
Software
- LPN is a toolchain that let hardware developers to specify a performance-only model of their hardware accelerators with a representation called Latency Petri Net (LPN). The toolchain includes different tools that transform the LPN into different representations for different usages (performance interface, verification condition, fast simulator and formats for visualization).
- PIX is a toolchain that automatically extracts performance interfaces from software network function (NF) implementations. The resulting performance interfaces are accurate yet orders of magnitude simpler than the code itself, and they take mere minutes to extract
- Concord is a runtime that demonstrates how to achieve predictable, microsecond-scale control of execution time with low throughput overhead
- Bolt is a precursor to PIX, and it is used to automatically generate performance contracts for software network functions